StateMachine @StateMachine94

Joined December 2024

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D4rsh🦅 @d4rsh_tw

9 months ago

Why you should use linked lists instead of matrix to store graphs? 1/n

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Mohit Mishra @chessMan786

10 months ago

Win32 Memory Map

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Wait! I recognize that pattern! That's an AOI en.wikipedia.org/wiki/AND-OR-In…. I can't recall ever ending up with one so visible in any of my 74-series designs. Of course, it can be simplified(?) into a single type of gate, but let's see which gates I have spares of in the project.

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Uros Popovic @popovicu94

10 months ago

Dreaming up a CPU is easy. Verifying it actually works is the nightmare. During my time at Google working on TPU projects, I learned that you don't just "write Verilog." You have to build a complete ecosystem. I’ve built a custom CPU from scratch. Here is how I test it using Python. 🐍 The project is called Mrav. It's a custom CPU core I designed from the ground up. In traditional hardware design, you write your CPU in Verilog. Then, to test it, you usually write more Verilog (testbenches). I'm working on this entirely alone. For a one man show, this is slow, rigid, and painful. For Mrav, I wanted a "software-first" approach to hardware. Enter cocotb. It’s a framework that lets me drive the actual signals of my CPU simulation using standard Python. I don't write a Verilog testbench. I write a Python script that says "Raise the clock," "Reset the core," or "Check this register." Here is the best part: The RAM memory doesn't exist. I didn't write a RAM controller in Verilog. Instead, I wrote a Python class that pretends to be RAM. When the CPU asserts the "read" signal, my Python script catches it, looks up the data in a list, and drives the "data_in" wires. The CPU has no idea it's talking to a Python script. This allows for true Hardware/Software co-design. I use Bazel to glue this entire pipeline together into a single hermetic command. One command does all of this: 1. Assembles my custom assembly code into binary. 2. Compiles the SystemVerilog RTL. 3. Launches the Python test runner to simulate the hardware executing that binary. This is the power of treating hardware and software as a continuous engineering surface. You don't need expensive proprietary tools to do a simple chip design. You just need the right modular approach. I wrote a full breakdown of how I set up this simulation environment, including the Python code that mocks the memory. Read the deep dive here: popovicu.com/posts/custom-c…

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Тsфdiиg @tsoding

10 months ago

You used to be able to just create a Native GUI App in 10 seconds. No Electron, no Game Engines, no Web frameworks. Just a lean fast .EXE produced in seconds. Works on any Windows machine WITHOUT Internet connection. Software Development is actually going backwards.

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Piyush Itankar @_streetdogg

10 months ago

RPi-4 is a great vehicle to learn bare metal aarch64 CPU programming. The hack is, if you replace the kernel image on the SD card with a bare metal binary, the CPU boots that and you can take control of the CPU. Being able to boot a 64Bit ARM CPU from scratch is a god level super power. What you see in the image is the raspberry-pi hooked to a FT323H board (serving as the hardware debugger) connected to a host machine to be controlled via OpenOCD. If you are interested in learning how to boot a 64Bit ARM CPU from scratch, check the lectures I recorded here - pyjamabrah.com/library/#a-102 I and Mahmad did a deep dive into how to boot this CPU using baremetal code and a hardware debugger to single-step the cpu.

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Vivek Galatage @vivekgalatage

11 months ago

The definitive resource! mirrors.edge.kernel.org/pub/linux/kern…

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Piyush Itankar @_streetdogg

11 months ago

We have a whatsapp channel focused on Embedded Systems. We share nuggets, notes, articles, videos, other resources and pyjamabrah updates. If interested, join here: whatsapp.com/channel/0029Va…